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Lecture 37

The document discusses different methods of implementing priority interrupts in computer systems, including software polling, hardware priority interrupts, and daisy chain hardware priority interrupts. Software polling establishes priority by the order devices are polled but is flexible and low cost, though slow. Hardware priority interrupts use a priority interrupt manager to identify the highest priority interrupt request quickly in hardware. Daisy chain hardware priority interrupts work by having devices connected in a serial chain, with the closest interrupting device to the CPU getting access to interrupt the CPU when multiple interrupts occur simultaneously.

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Input/Output Organization 1 Lecture 37 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Overview  Peripheral Devices  Input-Output Interface  Asynchronous Data Transfer  Modes of Transfer  Priority Interrupt  Direct Memory Access  Input-Output Processor  Serial Communication
Input/Output Organization 2 Lecture 37 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Priority Interrupts Priority Interrupt by Software(Polling) - Priority is established by the order of polling the devices(interrupt sources) - Flexible since it is established by software - Low cost since it needs a very little hardware - Very slow Priority Interrupt by Hardware - Require a priority interrupt manager which accepts all the interrupt requests to determine the highest priority request - Fast since identification of the highest priority interrupt request is identified by the hardware - Fast since each interrupt source has its own interrupt vector to access directly to its own service routine Priority - Determines which interrupt is to be served first when two or more requests are made simultaneously - Also determines which interrupts are permitted to interrupt the computer while another is being serviced - Higher priority interrupts can make requests while servicing a lower priority interrupt
Input/Output Organization 3 Lecture 37 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Hardware Priority Interrupts – Daisy Chain Device 1 PI PO Device 2 PI PO Device 3 PI PO INT INTACK Interrupt request Interrupt acknowledge To next device CPU VAD 1 VAD 2 VAD 3 * Serial hardware priority function * Interrupt Request Line - Single common line * Interrupt Acknowledge Line - Daisy-Chain Interrupt Request from any device(>=1) -> CPU responds by INTACK <- 1 -> Any device receives signal(INTACK) 1 at PI puts the VAD on the bus Among interrupt requesting devices the only device which is physically closest to CPU gets INTACK=1, and it blocks INTACK to propagate to the next device