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Design of a low voltage low-dropout regulator

design-of-a-low-voltage-lowdropout-regulator-53640307

I3E Technologies

An efficient constant multiplier architecture based on vertical horizontal bi...

an-efficient-constant-multiplier-architecture-based-on-vertical-horizontal-binary-common-subexpression-elimination-algorithm-for-reconfigurable-fir-filter-synthesis-53640268

An efficient constant multiplier architecture based on vertical horizontal binary common sub-expression elimination algorithm for reconfigurable fir filter synthesis

Aging aware reliable multiplier design with adaptive hold logic

aging-aware-reliable-multiplier-design-with-adaptive-hold-logic-53640258

A high performance fir filter architecture for fixed and reconfigurable appli...

a-high-performance-fir-filter-architecture-for-fixed-and-reconfigurable-applications-53640245

A high performance fir filter architecture for fixed and reconfigurable applications

A generalized algorithm and reconfigurable architecture for efficient and sca...

a-generalized-algorithm-and-reconfigurable-architecture-for-efficient-and-scalable-orthogonal-approximation-of-dct-53640238

A generalized algorithm and reconfigurable architecture for efficient and scalable orthogonal approximation of dct

A combined sdc sdf architecture for normal i o pipelined radix-2 fft

a-combined-sdc-sdf-architecture-for-normal-i-o-pipelined-radix2-fft-53640227

Reverse converter design via parallel prefix adders  novel components, method...

reverse-converter-design-via-parallel-prefix-adders-novel-components-methodologyand-implementations-53638474

Reverse converter design via parallel prefix adders  novel components, methodology,and implementations

Pre encoded multipliers based on non-redundant radix-4 signed-digit encoding

pre-encoded-multipliers-based-on-nonredundant-radix4-signeddigit-encoding-53638449

Energy optimized subthreshold vlsi logic family with unbalanced pull up down ...

energy-optimized-subthreshold-vlsi-logic-family-with-unbalanced-pull-up-down-network-and-inverse-narrowwidth-techniques

Energy optimized subthreshold vlsi logic family with unbalanced pull up down network and inverse narrow-width techniques

Variable form carrier-based pwm for boost-voltage motor driver with a charge-...

variable-form-carrierbased-pwm-for-boostvoltage-motor-driver-with-a-chargepump-circuit-53410522

Variable form carrier-based pwm for boost-voltage motor driver with a charge-pump circuit

Ultrasparse ac link converters

ultrasparse-ac-link-converters-53410518

Single inductor dual-output buck–boost power factor correction converter

single-inductor-dualoutput-buckboost-power-factor-correction-converter-53410478

Ripple minimization through harmonic elimination in asymmetric interleaved mu...

ripple-minimization-through-harmonic-elimination-in-asymmetric-interleaved-multiphase-dc-dc-converters-53410461

Ripple minimization through harmonic elimination in asymmetric interleaved multiphase dc dc converters

Resonance analysis and soft switching design of isolated boost converter with...

resonance-analysis-and-soft-switching-design-of-isolated-boost-converter-with-coupled-inductors-for-vehicle-inverter-application-53410449

Resonance analysis and soft switching design of isolated boost converter with coupled inductors for vehicle inverter application

Reliability evaluation of conventional and interleaved dc–dc boost converters

reliability-evaluation-of-conventional-and-interleaved-dcdc-boost-converters-53410440

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