tspc

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Here are 3 public repositories matching this topic...

QBlobster / true-single-phase-clock

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A frequency divider implemented using true single-phase clock (TSPC).

spice vlsi divider cmos hspice tspc

Updated Sep 4, 2023
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ilambharathim / pll-5ghz-cmos-integer-n

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Transistor-level integer-N PLL targeting ~5 GHz in 90 nm CMOS (GPDK090) - PFD, charge pump, ring VCO, and /48 TSPC divider, simulated in Cadence Spectre

vlsi cadence-virtuoso mixed-signal cmos pll analog-design ring-oscillator vco charge-pump frequency-divider phase-locked-loop 90nm tspc integer-n

Updated Oct 3, 2026

SURIYA-R-K / fsm-sequence-detector

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Detects the binary sequence 1010 using a high-speed Mealy FSM with TSPC D Flip-Flops in Cadence Virtuoso. Supports overlapping detection and transient verification (90 nm GPDK).

fsm simulation waveform schematic spectre vlsi state-diagram cadence-virtuoso cadence digital-design mealy-machine virtuoso d-flipflop sequence-detector tspc

Updated Jan 10, 2026

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