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Add Verilog and SystemVerilog support for the // case#1

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frznchckn wants to merge 1 commit intovim-scripts:masterfrom
frznchckn:master
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Add Verilog and SystemVerilog support for the // case#1
frznchckn wants to merge 1 commit intovim-scripts:masterfrom
frznchckn:master

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@frznchckn
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I saw that VHDL is supported but not Verilog or SystemVerilog, so I added support using the // comment marker only.

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