OAID / Tengine Star 4.5k Code Issues Pull requests Tengine is a lite, high performance, modular inference engine for embedded device machine-learning arm mips tensorflow x86-64 container cuda acl cnn pytorch artificial-intelligence riscv tensorrt onnx nvdla npu supperedge Updated Mar 6, 2025 C++
LeiWang1999 / ZYNQ-NVDLA Star 392 Code Issues Pull requests NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA. fpga zynq verilog nvdla yolox-nano Updated Dec 27, 2023 Verilog
LCAI-TIHU / HW Star 46 Code Issues Pull requests LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peripherals. riscv ara nvdla aipu cva6 lcai-tihu Updated Jan 6, 2023 Verilog
isuckatdrifting / Zeus Star 24 Code Issues Pull requests NVDLA small config implementation on Zynq ZCU104 (evaluation) zynq accelerator nvdla Updated Mar 25, 2019 Verilog
LCAI-TIHU / SW Star 23 Code Issues Pull requests Discussions LCAI-TIHU SW is a software stack of the AI inference processor based on RISC-V compiler runtime inference riscv risc-v tvm nvdla aipu lcai-tihu Updated Dec 14, 2022 C
LeiWang1999 / nvdla-parser Star 13 Code Issues Pull requests A NVDLA Loadable Parser. flatbuffers nvdla Updated Mar 2, 2022 C
jxyjason / ZYNQMP-NVDLA Star 2 Code Issues Pull requests Run Nvidia Deep Learning Accelerator (NVDLA) in zynq ultrascale+ mpsoc zynq nvidia mpsoc nvdla deep-learning-accelerator zynqmp Updated Mar 28, 2024 Verilog
guoheng / nvdla_hw Star 0 Code Issues Pull requests RTL, Cmodel, and testbench for NVDLA nvdla Updated Oct 17, 2019 Verilog