A curated list of Computer Architecture and Systems resources
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Updated
Jan 30, 2026
A curated list of Computer Architecture and Systems resources
2025计算机考研专业课程408相关的复习经验,笔记,资源,真题
5-stage pipelined 32-bit MIPS microprocessor in Verilog
My Second Brain for Computer Science related stuff. Zero bullshit, short and sweet.
A collection of curated resources for learning Computer Science subjects and skills, that I garnered throughout my tenure as a CSE student. Contributions, and report of broken links are welcome.
All the homeworks, studies and projects I've done at Metu-CENG
Assignments from Gebze Technical University Computer Science Depertmant
tinyGPU: A Predicated-SIMD processor implementation in SystemVerilog
A terminal-based emulator of the ARM instruction set written in Golang
Design and documentation for a very simple 4-bit processor named NibbleBuddy and its assembler.
支持 45 条 MIPS 指令的单周期处理器 -- 计算机组成原理实验 NUAA Spring 2017
Verilog miniRV/RISC-V style CPU course project featuring single-cycle and five-stage pipeline designs with hazard handling.
北京邮电大学 2023-2024 春季学期《计算机组成原理》课程实验集合
CSC403: Computer Organization and Architecture [COA] & CSL403: Processor Architecture Lab [PAL] | SE Semester IV | Computer Engineering
Pipelined MIPS CPU(course assignment for BUAA-Computer-Organization)
Educational mobile game (Unity 6) simulating a RISC-V multi-cycle processor architecture. Developed as a Bachelor's Thesis at TU Darmstadt (Grade: 1.0).
All the homeworks, testers and projects done at METU-CENG
My solutions for Bilkent University CS224 Computer Organization Labs (Spring 2019). Includes assembly programming assignments together with various processor designs in System Verilog HDL
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