A reading list for SRAM-based Compute-In-Memory (CIM) research.
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Updated
Oct 29, 2025
A reading list for SRAM-based Compute-In-Memory (CIM) research.
IHP26a TinyTapeout implementation of a RISC-V CPU with an integrated SRAM-based compute-in-memory (CIM) accelerator for performing efficient analog matrix multiplications.
LLM inference SoC
Minimal PyTorch examples for the four-stage structural evolution from ANN to event-driven SNN: Stage 0 (baseline ANN) → Stage 1 (binarization) → Stage 2 (temporal expansion) → Stage 3 (temporal accumulation) → Stage 4 (reset & sparsity control).
DUB Sparsity for Crossbars
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
从零诞生的存算一体编程语言与基座 ⚛ 一切语言的源头也是尽头。10语言源头汇合(C/C#/Rust/Python/Lisp/Haskell/Erlang/APL/Q#/J)、统一XL01字节码、自研编译器栈、自举、从零训练10M参数线性注意力基座。The origin and the end of all languages. Storage-compute unity, born from scratch.
Some experiments to perform parallel data operations (compute-in-memory) on a 1980ies DRAM chip controlled with a CH32V003 RISC-V MCU
Two brains on one analog substrate from ~80% unsupervised SCFF bulk + ~20% closed-form SLDA namer: the math model for a forward-only, on-chip continual learner. Behavioral simulation, no silicon. Draft 6.0 = the "baby neocortex," validated across 11 phases.
HyperMR: Efficient Hypergraph-enhanced Matrix Storage on Compute-in-Memory Architecture. This work is presented at SIGMOD 2025.
Closed-loop HW/SW co-design for compute-in-memory accelerators — NSGA-II searches per-layer weight precision and column pruning, verified by real PyTorch QAT and physics simulation. The LLM explains the search; it never produces the numbers.
Witmem Technology / 知存科技 employee referral, careers and recruiting information
Visual system design interview atlas for backend, systems, hardware, embedded, and ACiM NPU design
Mythic — independent third-party profile of a public API surface, by API Evangelist. Mythic is a high-performance analog computing company building Analog Processing Units (APUs) for energy-efficient AI inference. Its compute-in-memory architecture stores AI model parameters directly in the processor to eliminate the memory bottleneck of traditiona
houmo — independent third-party profile of a public API surface, by API Evangelist. HOUMO.AI (后摩智能) is a Chinese fabless semiconductor company founded in 2020 that develops compute-in-memory (CIM / storage-and-computation integrated) edge AI chips for running large language models and other AI workloads on endpoint devices.
In-Synapse Activation: physical activation and compute-in-memory FFNs for vision, language, and device-level studies.
Enable mask-free visual dubbing with robust generative bootstrapping for image editing and inpainting
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